In power converters, series-connected high- and low-side switching elements are alternately turned on, which converts direct-current (DC) power input from a DC power source into different power, such as alternating-current (AC) power.
In these power converters, there is a technology to prevent the series-connected high- and low-side switching element from being simultaneously turned on, thus prohibiting a high-level through current from flowing through the high- and low-side switching elements. This technology is designed to turn off one of the high- and low-side switching elements, delay turn-on of the other thereof by a dead time from the turn-off timing, and turn on the other thereof after lapse of the dead time.
Introducing the dead time prevents the occurrence of a through current, but it may reduce the power conversion efficiency of the power converter. For this reason, it is important how the dead time should be determined in view of both the reliability and power conversion efficiency of the power converter.
On the other hand, there is a time lag between a falling point of time of a gate voltage for an IGBT, which is an example of a voltage-driven switching element, in response to an off command and a point of time when a collector current flowing through the IGBT actually falls down to a preset threshold value. Such a time lag will be referred to as a turn-off delay period. Turn-off delay periods for an IGBT are included in respective dead times therefor. For this reason, there are technologies for adjusting a turn-off delay period to adjust a corresponding dead time, one of which is disclosed in Japanese Patent Application Publication No. 2010-142074.
Note that turn-off delay periods of a switching element vary depending on values of parameters including a collector-emitter voltage, a collector current, switching-element's temperature; the values of the parameters occur during the respective turn-off delay periods. For this reason, each turn-off delay period is set to include a margin that allows the maximum change of each parameter, resulting in an increase of a corresponding dead time.
In view of the circumstances, the technology disclosed in the Patent Publication No. 2010-142074 stores a map representing the turn-off delay periods of a switching element of a power converter each correlating with values of the parameters. The technology obtains actual values of the parameters, and refers, for every switching cycle of a target switching element that should be turned on, to the map using the actual values of the parameters to obtain an actual turn-off delay period of the target switching element. Then, the technology corrects, based on the actual turn-off delay period, an initial value of a corresponding dead time between the target switching element and a switching element series connected thereto, and this correction is performed for every switching cycle; the initial value of the dead time contains a margin set forth above. This results in a reduction of a dead time defined between a corresponding on state of the target switching element and an on state of a switching element series connected thereto for each switching cycle.